General layout guidelines for printed circuit boards (PCB), which exist in relatively obscure documents, are summarized. Some guidelines apply specifically to microcontrollers; however, the guidelines are intended to be general, and apply to virtually all modern CMOS integrated circuits. This document covers most known and published layout techniques as applied in a low-noise, unshielded environment. Efforts have been made to target two-layer boards, and the maximum acceptable noise level is assumed to be 30 dB, or greater, more stringent than FCC Part 15. This level seems to be the upper limit of acceptable noise in European and U.S. automotive markets.This document does not always explain the why’s of a given technique because it is intended only as a reference document, not a teaching aid. The reader is cautioned against making the assumption that although on a prior design a given technique was not applied and the unit had acceptable performance, that the technique is not useful. Over time, as IC devices increase in speed and density, every method to isolate and reduce noise will be required.